1. Field of Invention
The present invention relates to a semiconductor device and the manufacturing process thereof. More particularly, the present invention relates to a method of manufacturing the self-aligned contact openings and the semiconductor device.
2. Description of Related Art
Along with the development of the technology of semiconductor, the size of the device is continuously reduced to deep submicron. The size of the current ultra large scale integration (ULSI) has been developed to 0.18 micron below. And, the more integrity of the integrated circuits, the smaller size of the contact openings of the metal and semiconductor. In general, the design of self-aligned contact (SAC) openings is applied to overcome the increasingly shrinking wire widths and to avoid misalignment of the contact openings.
FIG. 1A to FIG. 1C are the cross-sectional views of the conventional method of manufacturing self-aligned contact openings. Referring to FIG. 1A, first, a substrate 100 is provided. A plurality of device structures 102 and a plurality of doped regions 106 under the device structures 102 are formed on the substrate 100. Next, a dielectric layer 104, a conductive layer 108 and a silicon nitride layer 110 are sequentially formed on the surfaces of the substrate 100 and the device structures 102. Next, referring to FIG. 1B, an etching process is performed to form spacer 110a on the sidewall of the conductive layer 108. Next, an etching process is performed to form the conductor spacer 108a by using the spacer 110a as the mask, and the conductor spacer 108a exposes a top surface and a sidewall of the spacer 108a. Then, another spacer 112 is formed on the sidewall of the spacer 108a as protection. Meanwhile, the material of the spacer 112 also covers the exposed top surface of the conductive spacer 108a as protection. Next, referring to FIG. 1C, a dielectric layer 114 is formed on the substrate 100. Then, an etching process is performed to form the contact openings 116 in the dielectric layer 114 and to expose the substrate 100.
It is remarkable that the method of manufacturing self-aligned contact openings does not only avoid the problem of misalignment of the contact openings in a common photolithographic etching process, but also simplifies the manufacturing process because the use of a mask is omitted. Thus, the manufacturing cost is reduced. However, as the spacer material covered on the top surface of the conductive spacer 108a is thin, the spacer material covered on the top surface of the conductive spacer 108a would be continuously etched by the etchant in the self-aligned etching process when forming the contact openings, so as to expose the top of the conductive spacer 108a. Moreover, the contact interface 101 of the spacers 110a and 112 may be continuously etched by the etchant so as to expose the conductive spacer 108a. As a result, short circuit may occur between the contact opening plug and the conductive spacer 108a; the device performance is therefore affected.